NUTS - NTNU Test Satellite, a Norwegian CubeSat Project

OBC

The On-Board Computer will provide computing power for the payload, as well as log events, issue commands to the other modules in the satellite and monitor the state of the whole system. It is also one of the backplane master modules, meaning it is able to control certain aspects of the backplane, as described in the backplane section.

Functional overview

  • General data storage
  • Event logging
  • Command scheduling and dispatching
  • Backplane master
  • CAN bus member
  • Module programming
The OBC module is the only module with a significant amount of both volatile and non-volatile memory. It has a powerful MCU, making it suitable for on-board processor-intensive tasks.

Hardware

  • MCU: Atmel AVR32UC3A3256
  • 128KB SRAM and 256KB flash/program memory integrated in MCU package
  • 16Mbit SRAM external to MCU
  • 4Mbit OTP EPROM
  • Nordic Semiconductor nRF24LE1D 2.4GHz RF transceiver
  • USB Mini-B connector for diagnostics and testing
The microcontroller implements the AVR32A microarchitecture. It has no MMU, but has hardware support for protecting memory segments.

The 2.4GHz transceiver chip has not been tested yet. However, the idea is to use it in a wireless bus experiment.

The OTP ROM can be used to store firmware images. Because the OBC is a backplane master, it is able to reprogram any of the modules in the satellite.

Software

The OBC software is currently in development. The current configuration is as follows:
  • Operating system: FreeRTOS 7
  • Communications/Network library: Cubesat Space Protocol
The Cubesat Space Protocol-library is developed and maintained by GomSpace.